Increase timeout for test_lock_contention on RISC-V (#18430)

This PR addresses a test failure for
`tests.handlers.test_worker_lock.WorkerLockTestCase.test_lock_contention`
which consistently times out on the RISC-V (specifically `riscv64`)
architecture.

The test simulates high lock contention and has a default timeout of 5
seconds, which seems sufficient for architectures like x86_64 but proves
too short for current RISC-V hardware/environment performance
characteristics, leading to spurious `tests.utils.TestTimeout` failures.

This fix introduces architecture detection using `platform.machine()`.
If a RISC-V architecture is detected:
* The timeout for this specific test is increased (e.g., to 15 seconds
).

The original, stricter timeout (5 seconds) and lock count (500) are
maintained for all other architectures to avoid masking potential
performance regressions elsewhere.

This change has been tested locally on RISC-V, where the test now passes
reliably, and on x86_64, where it continues to pass with the original
constraints.

---

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changelog.d/18430.bugfix

@@ -0,0 +1 @@
+Fix the `tests.handlers.test_worker_lock.WorkerLockTestCase.test_lock_contention` test which could spuriously time out on RISC-V architectures due to performance differences.

tests/handlers/test_worker_lock.py

@@ -19,6 +19,9 @@
 #
 #
 
+import logging
+import platform
+
 from twisted.internet import defer
 from twisted.test.proto_helpers import MemoryReactor
 
@@ -29,6 +32,8 @@ from tests import unittest
 from tests.replication._base import BaseMultiWorkerStreamTestCase
 from tests.utils import test_timeout
 
+logger = logging.getLogger(__name__)
+
 
 class WorkerLockTestCase(unittest.HomeserverTestCase):
     def prepare(
@@ -53,12 +58,27 @@ class WorkerLockTestCase(unittest.HomeserverTestCase):
 
     def test_lock_contention(self) -> None:
         """Test lock contention when a lot of locks wait on a single worker"""
-
+        nb_locks_to_test = 500
+        current_machine = platform.machine().lower()
+        if current_machine.startswith("riscv"):
+            # RISC-V specific settings
+            timeout_seconds = 15  # Increased timeout for RISC-V
+            # add a print or log statement here for visibility in CI logs
+            logger.info(  # use logger.info
+                f"Detected RISC-V architecture ({current_machine}). "
+                f"Adjusting test_lock_contention: timeout={timeout_seconds}s"
+            )
+        else:
+            # Settings for other architectures
+            timeout_seconds = 5
         # It takes around 0.5s on a 5+ years old laptop
-        with test_timeout(5):
-            nb_locks = 500
-            d = self._take_locks(nb_locks)
-            self.assertEqual(self.get_success(d), nb_locks)
+        with test_timeout(timeout_seconds):  # Use the dynamically set timeout
+            d = self._take_locks(
+                nb_locks_to_test
+            )  # Use the (potentially adjusted) number of locks
+            self.assertEqual(
+                self.get_success(d), nb_locks_to_test
+            )  # Assert against the used number of locks
 
     async def _take_locks(self, nb_locks: int) -> int:
         locks = [